/**
 ******************************************************************************
 * @file    assi.c
 * @author  hyseim software Team
 * @date    05-Sep-2023
 * @brief   This file provides all the assi functions.
 ******************************************************************************
 * @attention
 *
 * Copyright (c) 2020 Hyseim. Co., Ltd.
 * All rights reserved.
 *
 * This software is licensed under terms that can be found in the LICENSE file
 * in the root directory of this software component.
 * If no LICENSE file comes with this software, it is provided AS-IS.
 *
 ******************************************************************************
 */

/* Includes ------------------------------------------------------------------*/
#include "chip_define.h"
#include "uart.h"
#include "assi.h"
#include "spi.h"
#include "i2c.h"

int32_t ASSI_DeInit(void *base)
{
    // presetn and rst_n
    int32_t ret = 0;
    switch ((int32_t)base)
    {
    case (int32_t)UART0:
    case (int32_t)I2C0:
        im_write32((CRG_BASE + 0x110), (0x3 << 0) | ((0x3 << 0) << 16));
        im_write32((CRG_BASE + 0x110), (0x0 << 0) | ((0x3 << 0) << 16));
        break;
    case (int32_t)UART1:
    case (int32_t)I2C1:
        im_write32((CRG_BASE + 0x110), (0x3 << 2) | ((0x3 << 2) << 16));
        im_write32((CRG_BASE + 0x110), (0x0 << 2) | ((0x3 << 2) << 16));
        break;
    case (int32_t)UART2:
    case (int32_t)I2C2:
        im_write32((CRG_BASE + 0x110), (0x3 << 4) | ((0x3 << 4) << 16));
        im_write32((CRG_BASE + 0x110), (0x0 << 4) | ((0x3 << 4) << 16));
        break;
    case (int32_t)UART3:
    case (int32_t)I2C3:
        im_write32((CRG_BASE + 0x110), (0x3 << 6) | ((0x3 << 6) << 16));
        im_write32((CRG_BASE + 0x110), (0x0 << 6) | ((0x3 << 6) << 16));
        break;
    case (int32_t)UART4:
    case (int32_t)I2C4:
        im_write32((CRG_BASE + 0x110), (0x3 << 8) | ((0x3 << 8) << 16));
        im_write32((CRG_BASE + 0x110), (0x0 << 8) | ((0x3 << 8) << 16));
        break;
    case (int32_t)UART5:
    case (int32_t)I2C5:
        im_write32((CRG_BASE + 0x110), (0x3 << 10) | ((0x3 << 10) << 16));
        im_write32((CRG_BASE + 0x110), (0x0 << 10) | ((0x3 << 10) << 16));
        break;
    case (int32_t)UART6:
    case (int32_t)I2C6:
        im_write32((CRG_BASE + 0x110), (0x3 << 12) | ((0x3 << 12) << 16));
        im_write32((CRG_BASE + 0x110), (0x0 << 12) | ((0x3 << 12) << 16));
        break;
    case (int32_t)UART7:
    case (int32_t)I2C7:
        im_write32((CRG_BASE + 0x110), (0x3 << 14) | ((0x3 << 14) << 16));
        im_write32((CRG_BASE + 0x110), (0x0 << 14) | ((0x3 << 14) << 16));
        break;
    default:
        ret = 1;
        break;
    }

    return ret;
}

int32_t ASSI_Init(void *base)
{
    int32_t ret = 0;

    switch ((int32_t)base)
    {
    case (int32_t)UART0:
        ((ASSI_t *)ASSI(0))->mode = ASSI_MODE_UART;
        break;
    case (int32_t)UART1:
        ((ASSI_t *)ASSI(1))->mode = ASSI_MODE_UART;
        break;
    case (int32_t)UART2:
        ((ASSI_t *)ASSI(2))->mode = ASSI_MODE_UART;
        break;
    case (int32_t)UART3:
        ((ASSI_t *)ASSI(3))->mode = ASSI_MODE_UART;
        break;
    case (int32_t)UART4:
        ((ASSI_t *)ASSI(4))->mode = ASSI_MODE_UART;
        break;
    case (int32_t)UART5:
        ((ASSI_t *)ASSI(5))->mode = ASSI_MODE_UART;
        break;
    case (int32_t)UART6:
        ((ASSI_t *)ASSI(6))->mode = ASSI_MODE_UART;
        break;
    case (int32_t)UART7:
        ((ASSI_t *)ASSI(7))->mode = ASSI_MODE_UART;
        break;
    case (int32_t)MSPI0:
        ((ASSI_t *)ASSI(0))->mode = ASSI_MODE_MSPI4;
        break;
    case (int32_t)MSPI1:
        ((ASSI_t *)ASSI(1))->mode = ASSI_MODE_MSPI4;
        break;
    case (int32_t)MSPI2:
        ((ASSI_t *)ASSI(2))->mode = ASSI_MODE_MSPI4;
        break;
    case (int32_t)MSPI3:
        ((ASSI_t *)ASSI(3))->mode = ASSI_MODE_MSPI4;
        break;
    case (int32_t)MSPI4:
        ((ASSI_t *)ASSI(4))->mode = ASSI_MODE_MSPI4;
        break;
    case (int32_t)MSPI5:
        ((ASSI_t *)ASSI(5))->mode = ASSI_MODE_MSPI4;
        break;
    case (int32_t)MSPI6:
        ((ASSI_t *)ASSI(6))->mode = ASSI_MODE_MSPI4;
        break;
    case (int32_t)MSPI7:
        ((ASSI_t *)ASSI(7))->mode = ASSI_MODE_MSPI4;
        break;
    case (int32_t)SSPI0:
        ((ASSI_t *)ASSI(0))->mode = ASSI_MODE_SSPI;
        break;
    case (int32_t)SSPI1:
        ((ASSI_t *)ASSI(1))->mode = ASSI_MODE_SSPI;
        break;
    case (int32_t)SSPI2:
        ((ASSI_t *)ASSI(2))->mode = ASSI_MODE_SSPI;
        break;
    case (int32_t)SSPI3:
        ((ASSI_t *)ASSI(3))->mode = ASSI_MODE_SSPI;
        break;
    case (int32_t)SSPI4:
        ((ASSI_t *)ASSI(4))->mode = ASSI_MODE_SSPI;
        break;
    case (int32_t)SSPI5:
        ((ASSI_t *)ASSI(5))->mode = ASSI_MODE_SSPI;
        break;
    case (int32_t)SSPI6:
        ((ASSI_t *)ASSI(6))->mode = ASSI_MODE_SSPI;
        break;
    case (int32_t)SSPI7:
        ((ASSI_t *)ASSI(7))->mode = ASSI_MODE_SSPI;
        break;
    case (int32_t)I2C0:
        ((ASSI_t *)ASSI(0))->mode = ASSI_MODE_I2C;
        break;
    case (int32_t)I2C1:
        ((ASSI_t *)ASSI(1))->mode = ASSI_MODE_I2C;
        break;
    case (int32_t)I2C2:
        ((ASSI_t *)ASSI(2))->mode = ASSI_MODE_I2C;
        break;
    case (int32_t)I2C3:
        ((ASSI_t *)ASSI(3))->mode = ASSI_MODE_I2C;
        break;
    case (int32_t)I2C4:
        ((ASSI_t *)ASSI(4))->mode = ASSI_MODE_I2C;
        break;
    case (int32_t)I2C5:
        ((ASSI_t *)ASSI(5))->mode = ASSI_MODE_I2C;
        break;
    case (int32_t)I2C6:
        ((ASSI_t *)ASSI(6))->mode = ASSI_MODE_I2C;
        break;
    case (int32_t)I2C7:
        ((ASSI_t *)ASSI(7))->mode = ASSI_MODE_I2C;
        break;

    default:
        ret = 1;
        break;
    }

    return ret;
}
